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Fets and Crosses: Tic-Tac-Toe built from 2458 discrete transistors

40 points

by voxadam

3 days ago

| past

| 6 comments

| schilk.co

| HN

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schobi

6 minutes ago

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Brilliant to get this done all the way through.

Once you introduce a HDL and start optimizing, I would expect more than half of the transistors to be redundant. But you would end up with a circuit that you will not understand any more.. But that could give an important lesson in chip design and HDL compilers.

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SouthSeaDude

6 hours ago

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A Work of art. I remember my dad building a computer using discrete TTL chips in our garage in Auckland. He took like two years and I'm guessing about five people saw it. I would love to see more of these on HN, but most don't get past a few upvotes in the sea of AI stuff.

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Neywiny

6 hours ago

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Good news is there's still a lot of that on YouTube. I attribute it to Ben Eater but I'm sure there are others who helped or came before

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roywiggins

6 hours ago

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vaguely related: MENACE

https://en.wikipedia.org/wiki/Matchbox_Educable_Noughts_and_...

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eesmith

1 hour ago

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"A Tinkertoy computer that plays tic-tac-toe" - https://tcm.computerhistory.org/Timeline/TinkerToy.pdf and https://www.computerhistory.org/collections/catalog/X39.81

"Great Tinkertoy Computer" - https://www.science20.com/brain_candyfeed_your_mind/great_ti...

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B1FF_PSUVM

5 hours ago

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Ah, so that's where Fred Saberhagen got the gimmick for his first Berserker story - "Without a Thought" / "Fortress Ship", 1963.

(A spaceman uses a pet that plays with beads to simulate not being temporarily incapacitated by a 'mind beam' attack.)

Thank you.

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floxy

3 days ago

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Sweet. About the same number of transistors used in the Intel 4004.

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pankajdoharey

3 hours ago

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That's a lot of transistors. Why do I feel it could be done in less? This is the absolute minimum number of Discrete transistors you need?

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voxadam

3 hours ago

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"In case it is not already obvious, efficiency and sensibility were not a top priority when working on this project. I am sure there are more efficient flip- flop designs or implementations with fewer transistors, especially by building composite gates that combine NAND and NOR gates, but I don't really care :)"

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Neywiny

5 hours ago

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Would standard HDL synthesis engines be better at this in terms of schematic capture? They could do optimizations that I think if I'm reading right weren't done here

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soopypoos

3 hours ago

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What for?